JPH0458766U - - Google Patents
Info
- Publication number
- JPH0458766U JPH0458766U JP10140190U JP10140190U JPH0458766U JP H0458766 U JPH0458766 U JP H0458766U JP 10140190 U JP10140190 U JP 10140190U JP 10140190 U JP10140190 U JP 10140190U JP H0458766 U JPH0458766 U JP H0458766U
- Authority
- JP
- Japan
- Prior art keywords
- dual port
- port ram
- bus
- internal
- control device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000009977 dual effect Effects 0.000 claims description 7
- 238000000034 method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10140190U JPH0458766U (en]) | 1990-09-27 | 1990-09-27 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10140190U JPH0458766U (en]) | 1990-09-27 | 1990-09-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0458766U true JPH0458766U (en]) | 1992-05-20 |
Family
ID=31844813
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10140190U Pending JPH0458766U (en]) | 1990-09-27 | 1990-09-27 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0458766U (en]) |
-
1990
- 1990-09-27 JP JP10140190U patent/JPH0458766U/ja active Pending